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Table 29.9. LCD Framerate Conversion Table
Resulting Framerate, CLK FRAME (Hz)
MUX Mode
Frame- rate
formula
LFACLK LCDpre = 2
kHz
LFACLK LCDpre = 1
kHz
LFACLK LCDpre =
0.5 kHz
LFACLK LCDpre =
0.25 kHz
Min
Max
Min
Max
Min
Max
Min
Max
Static
Duplex
Triplex
Quadruplex
LFACLK LCD /2
LFACLK LCD /4
LFACLK LCD /6
LFACLK LCD /8
128
64
43
32
1024
512
341
256
64
32
21
16
512
256
171
128
32
16
11
8
256
128
85
64
16
8
5
4
128
64
43
32
Table settings: Min: FDIV = 7, Max: FDIV = 0
29.3.8 Data Update
The LCD Driver logic that controls the output waveforms is clocked on LFACLK LCDpre . The LCD data and
Control Registers are clocked on the HFCORECLK. To avoid metastability and unpredictable behavior,
the data in the Segment Data (SEGDn) registers must be synchronized to the LCD driver logic. Also,
it is important that data is updated at the beginning of an LCD frame since the segment waveform
depends on the segment data and a change in the middle of a frame may lead to a DC-component in that
frame. The LCD driver has dedicated functionality to synchronize data transfer to the LCD frames. The
synchronization logic is applied to all data that need to be updated at the beginning of the LCD frames:
?
?
?
?
LCD_SEGDn
LCD_AREGA
LCD_AREGB
LCD_BACTRL
The different methods to update data are controlled by the UDCTRL bits in LCD_CTRL.
Table 29.10. LCD Update Data Control (UDCTRL) Bits
UDCTRL
00
01
10
Mode
REGULAR
FCEVENT
FRAMESTART
Description
The data transfer is controlled by SW and data synchronization is
initiated by writing data to the buffers. Data is transferred as soon as
possible, possibly creating a frame with a DC component on the LCD.
The data transfer is done at the next event triggered by the Frame
Counter (FC). See Section 29.3.9 (p. 430) for details on how to
configure the Frame Counter. Optionally, the Frame Counter can also
generate an interrupt at every event.
The data transfer is done at frame-start.
29.3.9 Frame Counter (FC)
The Frame Counter is synchronized to the LCD frame start and will generate an event after a
programmable number of frames. An FC event can trigger:
?
?
?
?
LCD ready interrupt
Blink (controlling the blink frequency)
Next state in the Animation State Machine
Data update if UDCTRL = 01
The Frame Counter is a down counter. It is enabled by writing FCEN in LCD_BACTRL. Optionally, the
Frame Counter can be prescaled so that the Frame Counter is decremented at:
2011-04-12 - d0001_Rev1.10
430
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